Matthew Burns develops go-to-market strategies for Samtec’s Silicon-to-Silicon solutions. Over the course of 25 years, he has been a leader in design, applications engineering, technical sales and marketing in the telecommunications, medical and electronic components industries. He currently serves as Secretary at PICMG. Mr. Burns holds a B.S. in Electrical Engineering from Penn State University.
Dave Lazovsky is the Co-founder and CEO of Celestial AI, the creators of the Photonic FabricTM. Celestial AI, founded in April 2020, has developed the optical interconnectivity technology platform for AI computing.
Prior to founding Celestial AI, Mr. Lazovsky was a Venture Partner at Khosla Ventures. He has 30 years of experience in the semiconductor industry and over two decades of experience building and leading successful start-ups. In 2004 Mr. Lazovsky founded Intermolecular, a semiconductor and clean energy R&D and Intellectual Property licensing company. He served as the company’s Chief Executive Officer, President and as a member of the board of directors from September 2004 through October 2014.
As President and CEO, Mr. Lazovsky led all aspects of the business through its lifecycle from early-stage start-up to public company. Intermolecular (IMI) went public on the NASDAQ in 2011. He currently has over 80 issued and pending U.S. patents.
Andrew Sloss is VP of Technology at Vaire Computing. A founding engineer at Arm, he played a central role in the design and deployment of 27 commercial compute systems and helped scale the company’s architecture to over 150 billion chips shipped globally. He is the author of one of the most widely referenced books on ARM system architecture and has led engineering teams across embedded, mobile, and datacenter domains. At Vaire, Andrew brings decades of silicon and systems design experience to bear on one of the hardest challenges in computing: reducing AI energy costs at scale.
Brett is a co-founder of Arete (formed in 2000) and is based in the firm's London office. He focuses on the global semiconductor component sector. Brett is a regular public speaker at industry events and after 17 years looking at the sector, has a wealth of experience to draw on. Prior to Arete, Brett spent two years at Goldman Sachs in an equity analyst role, specialising in European technology following three years with Ericsson UK, working in business development, covering all aspects of wireline and wireless telecom infrastructure.
Since 2006, Amazon Web Services has been the world’s most comprehensive and broadly adopted cloud. AWS has been continually expanding its services to support virtually any workload, and it now has more than 240 fully featured services for compute, storage, databases, networking, analytics, machine learning and artificial intelligence (AI), Internet of Things (IoT), mobile, security, hybrid, media, and application development, deployment, and management from 114 Availability Zones within 36 geographic regions, with announced plans for 12 more Availability Zones and four more AWS Regions in New Zealand, the Kingdom of Saudi Arabia, Taiwan, and the AWS European Sovereign Cloud. Millions of customers—including the fastest-growing startups, largest enterprises, and leading government agencies—trust AWS to power their infrastructure, become more agile, and lower costs. To learn more about AWS, visit aws.amazon.com.
Brett is a co-founder of Arete (formed in 2000) and is based in the firm's London office. He focuses on the global semiconductor component sector. Brett is a regular public speaker at industry events and after 17 years looking at the sector, has a wealth of experience to draw on. Prior to Arete, Brett spent two years at Goldman Sachs in an equity analyst role, specialising in European technology following three years with Ericsson UK, working in business development, covering all aspects of wireline and wireless telecom infrastructure.
Janco joined Arete in 2023 and is based in the firm’s Cape Town office. He focuses on the global semiconductor component sector as an equity research analyst. Janco joined Arete after a distinguished career as a professional sportsman, where he took on various leadership roles and was a regular public speaker.
Sid Sheth is the co-founder and CEO of d-Matrix, the company changing the trajectory of commercially viable generative AI by introducing an entirely new computing paradigm designed from the ground-up for AI inference in modern datacenters.
Sid spent over two decades as a business and technical leader transforming startups into industry leaders and creating new categories of technology, taking them from innovations to commercialization. Before founding d-Matrix, Sid served as senior vice president & general manager for the Networking Business Unit at Inphi Corporation where he incubated and grew the group into a $1B+ business by focusing the business on the cloud and enterprise data center segment. Prior to Inphi, Sid was at NetLogic Microsystems (now Broadcom) and Intel where he ran marketing and worked in R&D for networking chips and processors.
Sid earned his MSEE from Purdue University, where he serves on the Electrical and Computer Engineering Advisory Board. He is a regularly featured speaker at industry tradeshows and conferences, is a published author at ISSCC and holds multiple patents.
Dr. Dharmendra S. Modha is an IBM Fellow and IBM Chief Scientist for Brain-inspired Computers. He is a cognitive computing pioneer who envisioned and now leads a highly successful effort to develop brain-inspired computers. The groundbreaking project is multi-disciplinary, multi-national, multi-institutional and has had worldwide scientific impact. It has been funded to the tune of >$200M by DARPA, DOD, DOE, and Commercial contracts. Its resulting revolutionary computing architecture and ecosystem break from the prevailing von Neumann paradigm and constitute a foundation for new classes of ultra-low-power, compact, real-time, multi-modal sensorimotor information technology systems.
Dr. Modha has made significant contributions to IBM businesses via innovations in caching mechanisms for storage controllers, clustering algorithms for services, and coding theory for disk drives. His work has been featured in Economist, Science, New York Times, BBC, Discover, MIT Technology Report, Associated Press, Popular Mechanics, Communications of the ACM, Forbes, Fortune, and IEEE Spectrum amongst thousands of media mentions. Author of over 80 papers and inventor of over 200 patents, he has been a recipient of ACM’s Gordon Bell Prize; Misha Mahowald Prize; R&D Magazine’s 2016 Scientist of the Year; USENIX/FAST Test of Time Award; Best Paper Awards at ASYNC and IDEMI; First Place, Science/NSF International Science & Engineering Visualization Challenge; IIT Bombay Distinguished Alumnus Award; UCSD ECE Distinguished Alumnus Award; R&D 100 Award; and is a Fellow of IEEE and World Technology Network. In 2013 and 2014, he was named as Best of IBM. TrueNorth and NorthPole have both been accepted into the Computer History Museum. On their 40th Anniversary, EE Times named Dr. Modha amongst 10 Electronics Visionaries to Watch.
Dr. Modha received BTech from IIT Bombay in 1990 and PhD from UCSD in 1995.
Movellus provides energy and performance optimized infrastructure IP for complex chips in the AI Era. These areas span power, clocking, and on-die sensing to maximize energy efficiency for your next SoC.
Cadence’s goal is to empower engineers at semiconductor and systems companies to create innovative, intelligent, and highly differentiated electronic products that transform the way people live, work, and play. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to systems—in AI, IoT, mobile, 5G, consumer, cloud, data center, automotive, aerospace, and other market segments. Cadence offers specialized IP with industry-leading performance, power efficiency, and interconnects, as well as AI-specific verification and implementation solutions. The company also employs machine learning within its tools and solutions to enable the best power, performance, and area (PPA), quality of results (QoR), and time-to-market (TTM) benefits.
As AI workloads continue to grow in complexity and scale, improving energy efficiency has become a
critical design objective from Silicon to Systems. This tutorial explores a holistic approach to optimizing
performance per watt across the entire hardware/software stack.
Godwin Maben is a seasoned professional with an extensive 30-year experience in the semiconductor industry, specializing in low-power design and power optimization for System on Chip (SoC) architectures. Godwin has contributed to the development of SoCs for mobile, IoT, GPU, and networking applications, focusing on ARM and RISC-V based designs.
Godwin has a proven track record in developing the architecture of Power Management Integrated Circuits (PMIC) for mobile and IoT devices, and architecting mobile SoCs with advanced power structures, including power gating, Dynamic Voltage and Frequency Scaling (DVFS), and Multi-Voltage (MV) techniques.
In addition to optimizing logic, system, and RTL architectures to reduce power for hundreds of blocks, Godwin has extensive experience in RTL coding, specifically targeting energy efficiency for hundreds of partitions. Skilled in developing custom cells to minimize glitches and has implemented algorithms within tools to optimize power consumption.
Godwin has developed comprehensive methodologies for implementing zero-pin retention flops from pre-RTL to silicon and has architected tools such as UPF Architect. Additionally, has created higher-level abstractions to Natural Language Processing (NLP) for various tools, including HDL, SDC, and UPF.
With expertise in designing low-power circuits and HDL coding with a focus on low power, Godwin excels in power architecture, PMIC design, and debugging power issues from simulation through emulation, synthesis, place, and route (P&R), and Engineering Change Order (ECO) processes. Dedicated to advancing low-power design techniques and methodologies, ensuring the development of energy-efficient and high-performance semiconductor solutions.
